\ 
\ Last_change: KS 18.03.2013 18:20:57
\
\ MicroCore load screen for simulation of the multi tasker.
\ It produces a VHDL-file that models the program memory.
\
Only Forth also definitions hex

[IFDEF] empty unpatch empty [ENDIF] Marker empty

include gforth-config.fs        \ Some System word (re)definitions for a more sympathetic environment
include vhdl.fs                 \ simple VHDL interpreter for constants
include ../uCore/constants.vhd
include microcore.fs            \ the cross-compiler
include images.fs               \ object code output files
include disasm.fs               \ the disassembler
include constants.fs            \ MicroCore Register addresses and bits

new Target                      \ reset target compiler and go into target compilation mode

8 trap-addr code-origin
          0 data-origin
      
include debugger.fs
include forth.fs
include multitask.fs
include task_test.fs

: boot  ( -- )
   0 task>dsp dsp! drop   0 task>rsp rsp!
   init  1 2 3  pause BEGIN rot REPEAT
;

#reset USR: rst    ( -- ) ['] boot             nop BRANCH ;USR  \ compile branch to TEST at reset vector location
#isr   USR: isr    ( -- ) ints@ drop                 IRET ;USR
#esr   USR: esr    ( -- ) r> 1- BRANCH                    ;USR  \ retry instruction
#break USR: break  ( -- ) ['] debugger         nop BRANCH ;USR

end

Boot-file ..\uCore\boot_rom.VHD  .( sim_tasks.fs written to boot_rom.vhd )
VHDL-file ..\uCore\program.VHD   .( sim_tasks.fs written to program.vhd )